Standard cell libraries have been a mainstay of chip design for many decades since the inception of logic synthesis and composition methodologies. Cell library IP typically contains Verilog models ...

This paper describes the process and tools used in the verification of a family of Secure Digital (SD) IP cores. The verification process described included SystemC verification, RTL simulation and ...

While simulation models of standard off-the-shelf memory components have taken leaps and bounds forward with respect to functionality and debug capabilities, embedded memory models have not changed ...

Libraries play a crucial role in the entire design verification and implementation flow (DVIF). Specifically for PA design verification and implementation, special design attributes are mandatory in ...

Register transfer level (RTL) verification remains the bottleneck in digital hardware design. Industry surveys show that functional verification accounts for 70 percent of the total design effort. Yet ...

Amongst various pre-silicon solutions, Software Simulation Platforms have always been the preferred environment due to early availability, ease of use, ease of access, lower cost as compared to FPGAs ...

Computational Fluid Dynamics (CFD) simulation of Hyper-X research vehicle airframe moving at Mach 7 with engine operating. SOURCE: NASA Dryden Flight Research. V&V and UQ are being pursued by NASA, ...

Many electronic design automation (EDA) solutions have evolved, which is not a bad thing. Evolution attempts to preserve the tools that are already in place—investments made by designers in languages, ...

Toshiba Electronic Devices & Storage Corporation ("Toshiba") has developed a model-based development (MBD) simulation technology that shortens verification times for automotive semiconductors by about ...